1. Field of the Invention
This invention generally relates to video signal processing apparatuses that drive liquid crystal display panels used in, for example, camcorders and liquid crystal projectors. In particular, this invention relates to a video signal processing apparatus in which circuits for processing video signals are separated in order to reduce both the size of the circuits and power consumption when a video signal is written into a liquid crystal panel.
2. Description of the Related Art
Recently, with the spread of equipment using liquid crystal display panels represented by camcorders and liquid crystal projectors, it is demanded that such liquid crystal display panels have higher performance. Accordingly, measures for the higher resolution and enhanced image quality of the liquid crystal display panel have been proceeding. For driving the liquid crystal display panels, in general, the following two methods are employed:
First, the point sequential sampling method is employed in thin film transistors, in particular, those having an active layer made from polycrystalline silicon, because of rapid response thereof. In this method a video signal corresponding to one pixel is written in a short period by using one signal line.
Second, the so-called plural-dot simultaneous sampling method and the so-called line sequential method are employed in liquid crystal display panels having enhanced resolution. In this method, signals are separated into a predetermined number of signals before a driving process is performed, and all the separated signals are simultaneously written in the panel.
Among these driving methods, the first point sequential sampling method is preferred, when viewed from the point of the simplification of the circuit. However, when high resolution is enhanced by increasing the number of pixels of the liquid crystal display panel, the video signal processing apparatus needs to have a broader frequency band. As a result, employing the point sequential sampling method becomes difficult. By way of example, in order to process high definition television signals whose speed is doubled, and XGA signals for computers, luminous signals need to have a frequency band higher than 40 MHz. It is, at present, extremely difficult to produce a video signal processing apparatus having such a frequency band. This is because a digital signal processor having a system clock of 80 MHz to cover the above frequency band can be realized but considerable power consumption is required therefor.
In connection with a high-voltage processing circuit intended for the interface with the liquid crystal display panel, this circuit is extremely difficult to realize because there is not a large-scale integrated circuit adapted therefor. Further, it is presently impossible to form a processing circuit having the above frequency band on the liquid crystal display panel in which polycrystal silicon is used. Consequently, in a video signal processing apparatus having a high-resolution liquid crystal display panel, only the plural dot simultaneous sampling method or the line sequential method can be employed. The present invention is concerned with this video signal processing apparatus having a high-resolution liquid crystal display panel. By referring to embodiments thereof, the present invention will be described below.
By referring to FIGS. 7 to 9, video signal processing apparatuses employing the point sequential sampling method will be described.
First, by referring to FIG. 7, a first example of a video signal processing apparatus will be described in connection with a configuration thereof. FIG. 7 is a block diagram showing a video signal processing apparatus employing the point sequential sampling method. Constituent elements are partly shown by abbreviations such as "TG", "AMP", "BUFF", and "SW".
The video signal processing apparatus employing the point sequential sampling method chiefly has a peripheral circuit 1 for handling an input video signal, a low-voltage processing circuit 2 in which processing that includes controlling image quality is performed in low-voltage circuit portions thereof, a liquid crystal panel 4, and a high-voltage processing circuit 3 for converting into signals for the liquid crystal panel.
The peripheral circuit 1 has an input terminal 5 to which video signals such as composite video signals are inputted, a decoder 6 for converting the input video signals into separate signals, R, G, and B signals (in the case of color liquid crystal panel), and a timing generator 7 for generating various control signals. The low-voltage processing circuit 2 includes a brightness controller 8 provided with control means, which is not shown, for controlling brightness, a contrast controller 9, a gamma corrector 10, an inverting amplifier 11, and a polarity switch 12.
The high-voltage processing circuit 3 includes an AC amplifier 13 and a buffer 14. The liquid crystal display panel 4 includes an H-scanner 15 including gate circuits and sample-and-hold circuits, a V-scanner 16 including enable gates and buffers. The H-scanner 15 is connected to signal lines as described below through switching devices 17, while the V-scanner 16 is connected to scanning lines (not shown). Thin film transistors (TFTs) are formed on the points where the signal lines and the scanning lines intersect with each other, which transistors form a display area 18.
The operation of the first example of the video signal processing apparatus having such a structure will be described.
A video signal such as a composite video signal inputted to the input terminal 5 in the peripheral circuit 1 in FIG. 7 is inputted to the decoder 6. The decoder 6 converts the signal into separate signals such as R, G, and B signals adapted for driving the liquid crystal display panel, and outputs synchronizing signals Hsync and Vsync to the timing generator 7. The timing generator 7 generates various control signals for controlling the liquid crystal display panel using a voltage-controlled oscillator (VCO) and synchronizing signals Hsync and Vsync, and outputs them to the low-voltage processing circuit 2 and the liquid crystal display panel 4. As examples of these control signals, sampling pulses SP necessary for sampling video signals, inversion pulses FRP for converting the video signals into AC signals, start pulses HST and VST for the H-scanner 15 and the V-scanner 16, clock pulses VCK and HCK, and so forth are given.
By controlling control means, as not shown, of the brightness controller 8, the contrast controller 9, and the gamma corrector 10 in the low-voltage processing circuit 2, brightness, contrast, and a gamma correction curve are controlled, respectively. The inverting amplifier 11 and the polarity switch 12 convert the video signals into AC signals, being synchronized with the inversion pulses FRP, so that the polarity switch 12 outputs video signals having predetermined polarities.
The AC amplifier 13 in the high-voltage processing circuit 3 amplifies the AC-converted video signals up to a predetermined image level. In connection with the resulting signals, processing including electric current amplification is performed in the buffer 14, in order to drive the load of the liquid crystal display panel 4.
The liquid crystal display panel 4 receives the video signals inputted from the above-described video signal processing apparatus and the control signals HST, HCK, VST, and VCK, and supplies them to the H-scanner 15 and the V-scanner 16. The V-scanner 16 sequentially selects one of the scanning lines every one horizontal period, while the H-scanner 15 sequentially selects one of the switching devices 17 every one horizontal period. The video signals are taken in the signal lines through the switching devices 17. The video signals taken in the lines control the liquid crystal molecules (not shown) using TFTs as described below so that the molecules are twisted to be tilted in the direction of a voltage to be applied, thereby an image is displayed on the display area 18. In accordance with such a driving circuit employing the point sequential sampling method, it is only a requirement that, with respect to one video signal, one signal line is connected to the last analog switch, which thus causes the extremely reduced size of the circuits.
By referring further to FIG. 8, a second example of a conventional video signal processing apparatus will be described.
FIG. 8 is a block diagram of a video signal processing apparatus employing the three-dot simultaneous sampling method. Components that are the same as those in the first example of the conventional apparatus are denoted by the same reference numerals. The description of the peripheral circuit will be omitted.
The video signal processing apparatus employing the three-dot simultaneous sampling method is used when a frequency band required in a signal processing apparatus is broadened by increasing the number of pixels forming the liquid crystal display panel. In accordance with the three-dot simultaneous sampling method, before a driving process the sub-sampling of video signals are predeterminedly performed so that they are separated, and the processing of low-frequency signals is performed in parallel. Currently, this method is employed in liquid crystal display panels in which one to five hundred thousand pixels of polycrystal silicon are formed.
By referring to FIG. 8, the second example of the video signal processing apparatus will be described.
The video signal processing apparatus in the second example chiefly has an input section 5' to which separate signals such as R, G, and B signals are inputted, a three-channel low-voltage processing circuit 2 which performs processing such as low-voltage-portion controlling of image quality, and a three-channel high-voltage processing circuit 3 which performs signal conversion for a liquid crystal display panel, and the liquid crystal display panel 4.
The low-voltage processing circuit 2 includes, for the three channels, sub-samplers 19a, 19b and 19c, brightness controllers 8a, 8b and 8c for controlling brightness, contrast controllers 9a, 9b and 9c, gamma correctors 10a, 10b and 10c, inverting amplifiers 11a, 11b and 11c, and polarity switches 12a, 12b and 12c.
The high-voltage processing circuit 3 includes AC amplifiers 13a, 13b and 13c, and buffers 14a, 14b and 14c, all of the above corresponding to the three channels. The liquid crystal display panel 4 includes an H-scanner 15 connected to switching devices 17, a V-scanner 16, and a display area 18, as similar to the first example of the conventional apparatus.
The operation of the apparatus in the second example will be described in connection with features thereof.
Separate signals such as R, G, and B signals inputted to the input section 5' in FIG. 8 are inputted to the low-voltage processing circuit 2 having three channels. The sub-samplers 19a, 19b and 19c in the low-voltage processing circuit 2 sub-sample the separate signals so that they are separated into R, G, and B video signals, based on sampling pulses SP (not shown), and outputs the sub-sampled signals to the brightness controllers 8a, 8b and 8c in the next stage. The subsequent operations are the same as those in the conventional apparatus in the first example, which thus will be omitted.
By referring to FIG. 9, a third example of the video signal processing apparatus will be described.
FIG. 9 is a block diagram of a video signal processing apparatus employing the 12-dot simultaneous sampling method.
In the video signal processing apparatus employing the 12-dot simultaneous sampling method, when the number of pixels is further increased compared with the apparatus in the second example, a frequency band required in a video signal processing apparatus becomes further broadened, and as a result, desired frequency characteristics cannot be satisfied by signal separation resulting from the three-dot simultaneous sampling method or the similar method. To this end, the 12-dot simultaneous sampling method in which the number of separated signals is more increased to narrow a frequency band actually required is used.
The apparatus employing the 12-dot simultaneous sampling method chiefly has an input section 5' to which separate signals such as R, G, and B signals are inputted, a low-voltage processing circuit 2 in which processing that includes controlling image quality is performed in low-voltage portions thereof corresponding to twelve channels, a high-voltage processing circuit 3 in which signal conversion is performed corresponding to the twelve channels, and a liquid crystal display panel 4.
The low-voltage processing circuit 2 includes 12-channel sub-samplers 19a to 19l, 12-channel brightness controllers 8a to 8l, 12-channel contrast controllers 9a to 9l, 12-channel gamma correctors 10a to 10l, 12-channel inverting amplifiers 11a to 11l, and 12-channel polarity switches 12a to 12l.
The high-voltage processing circuit 3 includes AC amplifiers 13a to 13l, and buffers 14a to 14l, all of the above corresponding to the twelve channels. The liquid crystal display panel 4 has the same structure as that in the conventional apparatus.
The operation of the apparatus in the third example will be described in connection with features thereof.
Separate signals such as R, G, and B signals inputted to the input section 5' in FIG. 9 are inputted to the low-voltage processing circuit 2 having twelve channels. The sub-samplers 19a to 19l in the low-voltage processing circuit 2 separate video signals such as the R, G, and B signals into twelve portions and output them to the brightness controllers 8a to 8l in the next stage while sub-sampling according to sampling pulses SP (not shown) generated by the timing generator. The subsequent operations are the same as those in the conventional apparatus in the second example, which thus will be omitted.
As described above, as the number of separated signals is increased, the size of circuits becomes enlarged and the number of lines becomes increased in a video signal processing apparatus. For example, if the number of separated signals is multiplied by four as the number of channels is increased from three to twelve, the size of circuits and the number of lines become four times greater. On the other hand, with the increased number of channels, display irregularity such as vertical lines caused by varied characteristics (gains, gamma and so forth) of the respective channels readily occur. In other words, the number of sections to be controlled for suppressing the display irregularity increases, and such controls require considerable time.